
EXTERNAL INTERRUPT SECTION 12
Page 12-1 RPC-330
DESCRIPTION
Interrupts are useful, and even necessary, when
intermittent signals of short duration require the
processors attention. Signals can be from door switches,
optical interrupters, missing pulse detectors, or other
electronic devices. The ONITR statement directs
program flow to a subrou tine when a n interr upt is
detected.
Two interrupts, IN T 0 and IN T 1, are ava ilable. Both
interrupts are either internally or externally generated.
Internal interrupts are from the quadrature encoder/
counters. This section describes exter nal interrupts.
Both interrupts at connector P2 and P3 are low-going
edge sensitive. Levels are sampled by the CPU every
180 ns, so pulse inputs to any interrupt must be at least
this long. Opto isolated input should have voltage
applied and/ or re moved for at least 10 micro -seconds to
ensure detection. Interrupts may be used to "wake-up"
the card from IDLE mode.
INT 0 and/or IN T 1 may be used as inputs, interrupts,
or both. Refer to SECTION 6, Using Interrupts as
Inputs for accessing using LINE function. When an
INT x line is used as an input or external inter rupt, it
may not be used as a counter interrupt. One interrupt
may be used with a counter and another m ay not, if
desired.
INT 0 is available from one of 3 sources. P2-ISOA and
P2-ISOB are optically isolated. P2-INT 0 is a non-
isolated, TTL input. The third source is from hardware
counter 0. Use jumper header H 2 for INT 0.
INT 1 is a non-isolated, TTL input from P3 or hardware
counter 1. Use jumper header H 3 for INT 1.
Available interrupts are shown in the table below.
H2 and H3 Description
Pins
1-2 Carry pulse from counter
3-4 Borrow pulse from counter
5-6 Exter nal interr upt
7-8 Carry or borr ow pulse from counter
9-10 Latched pulse using quadrature input
ONINT source selection is through jumper H2 and H3.
Pin [5-6] is jumpered to enable external interrupts.
When a counter is used, then its corresponding external
interrupt may not be used. C ounter 0 uses INT 0 and
counter 1 uses INT 1. See SECTI ON 14, Counter Inp uts
for more inform ation.
OPTICALLY ISOLATED
INTERRUPT/INPUT
ISOA and ISOB pr ovide an isolated , high voltage input.
Neither input is connecte d to groun d or + 5V and is
isolated to the card by at least 400 volts.
An exter nal voltage of a t least 3 volts, any polarity, w ill
turn on the isolator. Higher voltages may be used
provided a series resistor is in line to the supply. Use
the following formula to determine the series resistor
needed.
Rs = (Vi - 6) / .005
Where: Vi = input voltage
No series resistor is needed when Rs is negative.
INTERRUPT CHARACTERISTICS
Interrupts are negative going edge sensitive. This means
an interrupt is detected when INT 0 or 1 goes low. INT
0 and 1 must go low for at least 180 ns for reliable
detection. A voltage must be applied to P2-ISOA and
ISOB (INT 0 only) for at least 10 micro-seconds. To
detect a subsequent interrupt, the line must go high or
voltage removed at P2-ISOA or ISOB for at least 10
micro-seconds.
The status of the each interrupt line is read using the
following statement:
100 A = LINE(8) : REM INT 0
110 A = LINE(9) : REM INT 1
When A = 1, the interru pt is high or no voltage is
applied. When A = 0, the interrupt is low. H2 or H3
pins [5-6] must be jumpered to read a status.
The ONIT R statement responds to interrupts on a
priority basis. When INT 0 and INT 1 both go low
simultaneously, INT 1 is processed before INT 0. When
ONT ICK is active, O NITR processing is delayed until
the ONTICK subroutine is completed. ONTICK can
interrupt an ONITR program.
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